A data latch performs the role of storing a received digital data value, and providing this data value at an output. Generally, latches are implemented based on a pair of cross-coupled inverters, and are triggered by a clock pulse to capture the input data value. Combinations of latches can be used to implement more complex devices triggered by a clock edge, such as D-type flip-flops, SR (set reset) flip-flops, etc.
A drawback of existing latch circuits is that they are volatile devices, meaning that the stored data is lost if the supply voltage, which powers at least the inverters, is removed. This means that when the supply voltage is reapplied to a latch, the data to be stored by the latch must be loaded. In cases where there are many latches, this means performing many such load operations, which can be time and energy consuming.
In some applications, there is a need for a memory circuit that is able to provide an output data value without requiring such a load operation.